NIC TECHNOLOGY, INC.
CQH486V VESA
|
Processor |
80486SX/80486DX/80486DX2 |
|
Processor Speed |
20/25/33/50(internal)/50/66(internal) |
|
Chip Set |
UNI |
|
Max. Onboard DRAM |
32MB |
|
SRAM Cache |
64/128/256KB |
|
BIOS |
AMI |
|
Dimensions |
280mm x 220mm |
|
I/O Options |
32-bit VESA card slot (2) |
|
NPU Options |
None |
|
CONNECTIONS | |||
|
Purpose |
Location |
Purpose |
Location |
|
External battery |
JP17 |
Turbo LED |
TLED |
|
Power LED & keylock |
KEYL |
Turbo switch |
TSW |
|
Reset switch |
RSW |
32-bit VESA card |
S1 |
|
Speaker |
SPK |
32-bit VESA card |
S2 |
|
USER CONFIGURABLE SETTINGS | |||
|
Function |
Jumper |
Position | |
| » |
Monitor type select color |
JP12 |
open |
|
Monitor type select monochrome |
JP12 |
closed | |
| » |
CMOS memory normal operation |
JP16 |
pins 1 & 2 closed |
|
CMOS memory clear |
JP16 |
pins 2 & 3 closed | |
|
DRAM CONFIGURATION | ||
|
Size |
Bank 0 |
Bank 1 |
|
1MB |
(4) 256K x 9 |
NONE |
|
2MB |
(4) 256K x 9 |
(4) 256K x 9 |
|
4MB |
(4) 1M x 9 |
NONE |
|
8MB |
(4) 1M x 9 |
(4) 1M x 9 |
|
16MB |
(4) 4M x 9 |
NONE |
|
20MB |
(4) 1M x 9 |
(4) 4M x 9 |
|
32MB |
(4) 4M x 9 |
(4) 4M x 9 |
|
CPU TYPE CONFIGURATION | ||
|
Type |
Jumper JP2 |
Jumper JP3 |
|
80486DX2 (PGA) |
pins 1 & 2 and 3 & 4 closed |
pins 2 & 3 closed |
|
80486DX (PGA) |
pins 1 & 2 and 3 & 4 closed |
pins 2 & 3 closed |
|
80486SX (PGA) |
pins 2 & 3 closed |
open |
|
80486SX (PQFP) |
open |
open |
|
CPU SPEED CONFIGURATION | ||||||
|
Speed |
ID2 |
ID3 |
JP33 |
JP72 |
JP100 |
JP101 |
|
66MHz (internal) |
closed |
closed |
pins 2 & 3 |
open |
closed |
pins 2 & 3 |
|
50MHz |
closed |
closed |
pins 1 & 2 |
open |
open |
pins 2 & 3 |
|
50 MHz (internal) |
closed |
open |
pins 2 & 3 |
closed |
open |
pins 1 & 2 |
|
33MHz |
closed |
closed |
pins 2 & 3 |
open |
closed |
pins 2 & 3 |
|
25MHz |
closed |
open |
pins 2 & 3 |
closed |
open |
pins 1 & 2 |
|
SRAM JUMPER CONFIGURATION | ||
|
Size |
Jumper JP7 |
Jumper JP8 |
|
64KB |
pins 2 & 3 closed |
open |
|
128KB |
pins 1 & 2 closed |
pins 2 & 3 closed |
|
256KB |
pins 1 & 2 closed |
pins 1 & 2 closed |
|
SRAM CONFIGURATION | |||
|
Size |
Cache SRAM |
Location |
TAG |
|
64KB |
(8) 8K x 8 |
Banks 0 & 1 |
(1) 8K x 8 |
|
128KB |
(4) 32K x 8 |
Bank 0 |
(1) 8K x 8 |
|
256KB |
(8) 32K x 8 |
Banks 0 & 1 |
(1) 32K x 8 |